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2 June 2003 Optimizing reticle inspection for the X architecture
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Abstract
Sub-wavelength lithography used for today's 130nm and 90nm node devices requires new approaches to both lithography processes and chip design. Reticle complexity has increased as OPC and Phase Shift techniques are used to improve lithography process windows at smaller design rules. Among new revolutionary design implementations specifically for metal layers, the X Architecture is an interconnect architecture based on the pervasive use of diagonal wiring, reducing total chip wire length by an average 20% and via count by an average of 30%, resulting in simultaneous improvements in chip speed, power, and cost. An important consideration for implementation of any new IC manufacturing process is early verification that the new process, technology, or design is has stable manufacturability in a production environment. To perform this verification for X Architecture reticle inspectability, an investigation was launched with the goal to optimize reticle inspection for X Architecture metal layers. The TeraStar reticle inspection system was used inspect two sources of X Architecture metal 4 and metal 5 layers, both employing X Architecture design data. This paper will present the results of these reticle inspections and will report the overall inspectability of the X Architecture design and the viability of TeraStar reticle inspection on these reticles in a production environment.
© (2003) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Christopher M. Aquino "Optimizing reticle inspection for the X architecture", Proc. SPIE 5038, Metrology, Inspection, and Process Control for Microlithography XVII, (2 June 2003); https://doi.org/10.1117/12.485004
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