Resist and silicon trench array line width measurement simulations for the next-generation semiconductor circuits by optical scattering properties using the FDTD method

Hirokimi Shirasaki; Kunio Ueta; Noriyuki Kondou

doi:10.1117/12.482643

2 June 2003 Resist and silicon trench array line width measurement simulations for the next-generation semiconductor circuits by optical scattering properties using the FDTD method

Hirokimi Shirasaki, Kunio Ueta, Noriyuki Kondou

Author Affiliations +

Proceedings Volume 5038, Metrology, Inspection, and Process Control for Microlithography XVII; (2003) https://doi.org/10.1117/12.482643
Event: Microlithography 2003, 2003, Santa Clara, California, United States

Abstract

This paper obtains basic numerical data fro measuring linewidths using light waves to contorl the sub-100nm resist and silicon linewidth. We use the finite-difference time-domain (FDTD) method as the numerical analysis method, becuase the method can consider the losses of permittivity of the resist and the silicon substrate. The linewidths are 2D on the assumption that they are uniformed in the same direction and the 2D Gaussian beams are irradiated. The TM modes with only electric fields and the TE modes with magnetic field polarized parallel to the trench are irradiated. Then, we examine the differences of complex amplitude reflectance by changing the groove widths and thickness of the resist and silicon. Since the TM modes have the cutoff property and the TE modes do not, the amplitude and the phase changes of TM modes are different from the TE modes. Especially, the phases change in linear and in proportion to the groove widths and depths. The amplitude relfectance characteristics of the reflected waves are also examined in changing the incidence angles and the wavelengths of the Gaussian beam. Finally, we confrim teh FDTD analysis is effective to obtain the reflected light characteristics close to the real photolithographic models.

Citation Download Citation

Hirokimi Shirasaki, Kunio Ueta, and Noriyuki Kondou "Resist and silicon trench array line width measurement simulations for the next-generation semiconductor circuits by optical scattering properties using the FDTD method", Proc. SPIE 5038, Metrology, Inspection, and Process Control for Microlithography XVII, (2 June 2003); https://doi.org/10.1117/12.482643

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