At the sub-90nm nodes, model-based OPC accuracy requirements call for highly accurate compact process modeling and modeling strategies. We examined a large number of CD measurement datasets from a variety of 193nm lithography environments to quantify CD contributions from the different processing steps: mask making, resist development and
etching. Based on this analysis, we developed a new class of OPC models, called VT5 models, based on the foundation of VTRE models. These physically-based, non-linear OPC models, heuristically capture various propagation, loading, and dissipation effects of silicon processing responsible for CD variability. The VT5 model comprises variable threshold and variable bias forms as functions of the optical image shape and layout density parameters. (Simpler VT5
version without the bias form and densities is reported in Y.Granik, N.Cobb, T.Do, "Universal process modeling with VTRE for OPC", SPIE 2002). We investigated various modeling strategies to streamline OPC model building and optimization. We identified primary optimization candidates among optical and process parameters, stressing model
verification as possibly the most important, but often overlooked, step in the model building sequence. Substantial gain in VT5 accuracy comfortably serves the sub-90nm process nodes for the model-based OPC flow within ITRS error budget targets.