10 July 2003 Optimization of the data preparation for variable-shape beam mask writing machines
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Abstract
As the industry enters the development of the 65nm node the presssure on the data path and atepout flow is growing. Design complexity and increased deployment of RET resut in rapidly growing file sizes, which turned the commodity of mask data preparation into a real bottleneck. Mask manufacturing starting with the 130nm nodes is accompanied by an increasing depoloyment of variable shaped beam (VSB) mask writing machines. This transition requires the adaptation of the established data preparation path to these circumstances. Historicially data has been presented mostly in MEBES or similar intermediate formats to the mask houses. Reformatting these data is a redundant operation, which in addition is not very efficient given the constraints of the intermediate formats. An alternate data preparation flow accommodating the larger files and re-gaining flexibility for TAT and throughput management downstream is suggested. This flow utilizes the hierarchicial gds-format as the exchange format in the mask data preparation. The introduction of a hierarchical exchange format enables the transfer of a number of necessary data preparation steps into the hierarchical domain. The paper illustrates the benefit of hierarchical processing based on gds-files with experimental data on file size reduction and TAT improvement for direct format conversions vs. re-fracturing as well as other processing steps. In contrast to raster scan mask making equipment, in a variable shaped beam mask writing machine the writing time and the ability to meet tight mask specification is affected by data preparation. Most critical are the control of the total shot count, file size and the efficient suppression of small figures. The paper will discuss these performance parameters and illustrate the desired practices.
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Steffen F. Schulze, Steffen F. Schulze, Patrick LaCour, Patrick LaCour, } "Optimization of the data preparation for variable-shape beam mask writing machines", Proc. SPIE 5042, Design and Process Integration for Microelectronic Manufacturing, (10 July 2003); doi: 10.1117/12.485261; https://doi.org/10.1117/12.485261
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