Volume holography is currently the subject of widespread interest as a fast-readout-rate, high-capacity digital data-storage technology. However, due to the effect of cross-talk noise, scattering noise, noise gratings formed during a multiple exposure schedule, it brings a lot of burst errors and random errors in the system. Reed-Solomon error-correction codes have been widely used to defend digital data against errors, but the speed of Reed-Solomon decoder for volume holographic storage system application is a challenge. This paper presents a high-speed VLSI decoder architecture implementation for decoding (255,223) Reed-Solomon codes with the Modified Berlekamp-Massey algorithm for volume holographic storage. In contrast to conventional Berlekamp-Massey architectures, the speed bottleneck is eliminated via a series of algorithmic transformations that result in a fully systolic architecture in which a single array of processors computes both the error-locator and the error-evaluator polynomials. The proposed architecture requirs approximately 25% fewer multipliers and a simpler control structure than the architectures based on the popular extended Euclidean algorithm. By adopting high speed CPLD, a data processing rate over 200 Mbit/s is realized. Moreover, for block-interleaved Reed-Solomon codes, embedding the interleaver memory into the decoder results in a further increase of the throughput.