ASIC design for a phase-sensitive signal conditioning unit for porous-silicon-based sensors

S. Dey; J. Das; H. Saha

doi:10.1117/12.514571

14 October 2003 ASIC design for a phase-sensitive signal conditioning unit for porous-silicon-based sensors

S. Dey, J. Das, H. Saha

Proceedings Volume 5062, Smart Materials, Structures, and Systems; (2003) https://doi.org/10.1117/12.514571
Event: Smart Materials, Structures, and Systems, 2002, Bangalore, India

Abstract

Porous Silicon (PS) based sensors are amenable to Silicon IC processing technology. This ushers in the concept of integrated on-chip sensors in which the sensor and its signal conditioning can be integrated on a single chip. The dielectric constant of the porous layer changes under external stimuli like ambient humidity, pressure, etc. Thus a phase sensitive signal conditioning unit that can be integrated with the transducer on the same chip can form an integrated sensor that can detect humidity, pressure, etc. In order to develop the ASIC design for such a phase detecting signal conditioning unit and to peform CAD simulations and verify our design we have also developed a model for the PS transducer that can be used as a device library at runtime during simulation. In this paper we shall discuss the ASIC design of the signal conditioning unit required to develop an integrated humidity sensor and developing a SPICE device model library of the PS transducer for simulation and implementation of a SMART integrated Sensor.

Citation Download Citation

S. Dey, J. Das, and H. Saha "ASIC design for a phase-sensitive signal conditioning unit for porous-silicon-based sensors", Proc. SPIE 5062, Smart Materials, Structures, and Systems, (14 October 2003); https://doi.org/10.1117/12.514571

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