The design for a large format digital visible light area array was developed based on A/D conversion at each pixel. Production CMOS technology was used in the development of a monolithic front side illuminated photo diode pixel. Each pixel includes a one loop MOSAD, multiplexed oversample A/D, converter, the photo diode and a buffered output to support a very large array format operating at a high frame rate. MOSAD is a modification of the delta sigma approach to A/D conversion. The requirements are to develop a 4,000 x 3,000 pixel array capable of up to 1,000 frames per second sample rate. A design was developed using the AMIS 0.35 μm CMOS process with a single poly and three metal layers. To approximately fit a 35 millimeter optics format, a pixel size of 8.5 μm was selected. There are no operational amplifiers required at the pixel to perform the A/D function, thus allowing a high fill factor. With this pixel size, a 48% fill factor and 38% photo diode area was achieved. The design can produce a pixel size of 4.3 μm square with the use of 0.18 μm CMOS without sacrificing fill factor. Alternate approaches to satisfy the 1 kiloframe sample rate with up to 10 bits dynamic range were analyzed. The design is still in progress with layout and simulation of the critical elements complete. This development program is sponsored by the Army White Sands Missile Range.