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12 May 2003 Compact modeling of noise for RF CMOS circuit simulation
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Proceedings Volume 5113, Noise in Devices and Circuits; (2003) https://doi.org/10.1117/12.492939
Event: SPIE's First International Symposium on Fluctuations and Noise, 2003, Santa Fe, New Mexico, United States
Abstract
We study the the thermal noise of short-channel NMOS transistors in a commercially available 0.13 micron CMOS technology. The experimental results are modeled with a non-quasi-static RF model, based on the principle of channel segmentation. The model is capable of predicting both drain and gate current noise accurately, without fitting any parmeters to the measured noise data. An essential ingredient of the model is the gate resistance, which is shown to dominate the gate current noise. In our optimized device layouts, this gate resistance is mainly determined by the silicide-to-polysilicon contact resistance.
© (2003) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Andries J. Scholten, Luuk F. Tiemeijer, Ronald van Langevelde, Ramon J. Havens, Adrie T. A. Zegers-van Duijnhoven, Randy de Kort, Vincent C. Venezia, and Dirk B. M. Klaassen "Compact modeling of noise for RF CMOS circuit simulation", Proc. SPIE 5113, Noise in Devices and Circuits, (12 May 2003); https://doi.org/10.1117/12.492939
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