Abstract
This report details the attempts made to realise nanocapacitors for nanoscale MOS based integrated circuits by AFM anodic oxidation, and therefore isolation, of nano-sized squares of poly-silicon, titanium and aluminium on Si/SiO2. Conductive AFM (C-AFM) was used to perform topographical and electrical characterisation. The experiments were performed with contact mode C-AFM, in ambient air, using Pt-Ir, Co-Cr and Ti coated (20nm) n-type silicon cantilevers. Each sample consisted of a 3-5nm thick conductor deposited on 6nm of SiO2, which was thermally grown on Phosphorus doped (1019 cm-3) n-type Si(100) substrates. Standard cleaning and passivation processes were used. Poly-silicon was immediately found to be too rough to oxidise. Initial current-voltage measurements inside of the titanium-oxide squares suggest initial isolation followed by degradation through Fowler-Nordheim tunnelling. Measurement inconsistencies seen suggest charge storage on the surface or tip with the barrier height of the native titanium oxide thought to be responsible. Al has a thicker natural oxide. To overcome this we designed a series of structures consisting of a Ti finger on SiO2, that is connected to a Ti bond pad, allowing direct probing by a semiconductor parameter analyser. AFM anodic oxidation was performed upon these Ti fingers to reduce their in-plane dimensions towards the nanoscale. To confirm the existence of a nanocapacitor topographical and electrical measurements were then done on and around them.
