As IC fabrication processes are maturing for the 130nm node, silicon manufacturers are focusing on 90nm device manufacturing at ever-lower k1 factors. Driven by cost savings, many integrated device manufacturers (IDMs) and foundries are working toward patterning critical mask layers of 90nm designs using high numerical aperture KrF exposure tools. The goal of this study is to find out whether KrF can be successfully used instead of ArF for fabricating 90nm devices. This exercise will help to gain learning for the upcoming 65nm node, where the early manufacturing phase will also be carried out at similar k1 near 0.3. For high volume wafer production, the cost and throughput are in favor of using a single exposure PSM technique. For low-volume, the high mask cost of Alt-PSM discourages its use. What are the most sensible KrF lithography patterning options at k1 = 0.3? For single exposure mask solutions at the 90nm node using KrF, there are two leading candidates: 6% attenuated PSM (Att-PSM) and Chromeless Phase Lithography (CPL). In this work, we explored and compared these two options in terms of the best achievable process latitude for patterning poly gate layer. First, we analyzed the diffraction patterns from 6% Att-PSM and CPL mask features and identified the optimum transmission for various pitches. Next, we examined the two options from a mask making perspective, accessing mask manufacturability, phase and transmission error control, defect sources, etc. In this paper, we describe how hybrid CPL can be used as a variable transmission mask to produce the best through pitch imaging performance and a practical implementation method for mask manufacturing.