In high-voltage electron beam lithography, most of the beam energy is released as heat and accumulates in the local area of writing. Excessive heat causes changes in resist sensitivity, which in turn causes significant critical dimension (CD) variation. Previous methods for reducing CD distortion caused by resist heating include usage of lower beam currents, increased delays between electron flashes, and multi-pass writing. However, all these methods lower mask writing throughput. This leads to increased mask writing cost, which is increasingly becoming a major limiting factor to semiconductor industry productivity. In this paper, we propose a new method for minimizing CD distortion caused by resist heating. Our method performs simultaneous optimization of beam current density and subfield writing order. Simulation experiments show that, compared to previous methods, the new subfield scheduling method leads to significant reductions in resist temperature with unchanged mask writing throughput. Alternatively, subfield scheduling can be coupled with the use of higher beam current densities, leading to increased writing throughput without increasing CD distortion.