Analysis of etched quartz solutions for 65-nm node critical layer lithography

Ebo H. Croffie; Neal P. Callan

doi:10.1117/12.518322

17 December 2003 Analysis of etched quartz solutions for 65-nm node critical layer lithography

Ebo H. Croffie, Neal P. Callan

Proceedings Volume 5256, 23rd Annual BACUS Symposium on Photomask Technology; (2003) https://doi.org/10.1117/12.518322
Event: Photomask Technology, 2003, Monterey, California, United States

Abstract

Manufacturability and economical viability of etched quartz solutions for 65nm node critical layer lithography is assessed through evaluation of mask technology conversion complexity, mask process complexity, wafer processing cost and SRAM cell critical layer lithography performance. The etched quartz technologies under consideration are the full-layout alternating phase shift mask solution (FullPhase altPSM) and chromeless hard shifter phase shift mask solution (crlPSM). Using 0.63 NA exposures, we achieve k1 =0.29 (DOF=0.6um) and k1 =0.33 (DOF=0.8um) for altPSM and crlPSM, respectively. 60nm isolated feature DOF is more than 0.8um for altPSM. The crlPSM isolated feature DOF without sub resolution assist features is about 0.3um. Simulations results of crlPSM isolated features with sub resolution assist features using NA=0.75 show that DOF of 0.3um is attainable for crlPSM. Experimental results are used to calibrate wafer volume cross over model for these competing technologies with specific focus on die size, k1 and DOF related yield as wafer processing cost drivers. Results show that altPSM has lower wafer processing cost due to better lithography yield at smaller die sizes. Thus, though the mask set of altPSM solution is more expensive than crlPSM, the altPSM solution is more economical for high volume production of 65nm node technologies. The wafer volume crossover model allows for the most cost effective mask solution to be employed for a given logic device and wafer volume expectation.

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Ebo H. Croffie and Neal P. Callan "Analysis of etched quartz solutions for 65-nm node critical layer lithography", Proc. SPIE 5256, 23rd Annual BACUS Symposium on Photomask Technology, (17 December 2003); https://doi.org/10.1117/12.518322

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KEYWORDS

Photomasks

Semiconducting wafers

Lithography

Quartz

Calibration

System on a chip

Data conversion

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