IP validation in remote microelectronics testing

Adam Osseiran; Kamran Eshraghian; Stefan Lachowicz; Xiaoli Zhao; Roger Jeffery; Michael Robins

doi:10.1117/12.523540

30 March 2004 IP validation in remote microelectronics testing

Adam Osseiran, Kamran Eshraghian, Stefan Lachowicz, Xiaoli Zhao, Roger Jeffery, Michael Robins

Proceedings Volume 5274, Microelectronics: Design, Technology, and Packaging; (2004) https://doi.org/10.1117/12.523540
Event: Microelectronics, MEMS, and Nanotechnology, 2003, Perth, Australia

Abstract

This paper presents the test and validation of FPGA based IP using the concept of remote testing. It demonstrates how a virtual tester environment based on a powerful, networked Integrated Circuit testing facility, aimed to complement the emerging Australian microelectronics based research and development, can be employed to perform the tasks beyond the standard IC test. IC testing in production consists in verifying the tested products and eliminating defective parts. Defects could have a number of different causes, including process defects, process migration and IP design and implementation errors. One of the challenges in semiconductor testing is that while current fault models are used to represent likely faults (stuck-at, delay, etc.) in a global context, they do not account for all possible defects. Research in this field keeps growing but the high cost of ATE is preventing a large community from accessing test and verification equipment to validate innovative IP designs. For these reasons a world class networked IC teletest facility has been established in Australia under the support of the Commonwealth government. The facility is based on a state-of-the-art semiconductor tester operating as a virtual centre spanning Australia and accessible internationally. Through a novel approach the teletest network provides virtual access to the tester on which the DUT has previously been placed. The tester software is then accessible as if the designer is sitting next to the tester. This paper presents the approach used to test and validate FPGA based IPs using this remote test approach.

Citation Download Citation

Adam Osseiran, Kamran Eshraghian, Stefan Lachowicz, Xiaoli Zhao, Roger Jeffery, and Michael Robins "IP validation in remote microelectronics testing", Proc. SPIE 5274, Microelectronics: Design, Technology, and Packaging, (30 March 2004); https://doi.org/10.1117/12.523540

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KEYWORDS

Field programmable gate arrays

Microelectronics

Networks

Information operations

Computer programming

System on a chip

Computer simulations

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