18 January 2004 Optimal speech codec implementation on ARM9E (v5E architecture) RISC processor for next-generation mobile multimedia
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Abstract
The mobile phone is undergoing a rapid evolution from a voice and limited text-messaging device to a complete multimedia client. RISC processors are predominantly used in these devices due to low cost, time to market and power consumption. The growing demand for signal processing performance on these platforms has triggered a convergence of RISC, CISC and DSP technologies on to a single core/system. This convergence leads to a multitude of challenges for optimal usage of available processing power. Voice codecs, which have been traditionally implemented on DSP platforms, have been adapted to sole RISC platforms as well. In this paper, the issues involved in optimizing a standard vocoder for RISC-DSP convergence platform (DSP enhanced RISC platforms) are addressed. Our optimization techniques are based on identification of algorithms, which could exploit either the DSP features or the RISC features or both. A few algorithmic modifications have also been suggested. By a systematic application of these optimization techniques for a GSM-AMR (NB) codec on ARM9E core, we could achieve more than 77% improvement over the baseline codec and almost 33% over that optimized for a RISC platform (ARM9T) alone in terms of processing cycle requirements. The optimization techniques outlined are generic in nature and are applicable to other vocoders on similar 'application-platform’ combinations.
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Ajay Kumar Bangla, Ajay Kumar Bangla, M. K. Vinay, M. K. Vinay, P. V. Suresh Babu, P. V. Suresh Babu, } "Optimal speech codec implementation on ARM9E (v5E architecture) RISC processor for next-generation mobile multimedia", Proc. SPIE 5308, Visual Communications and Image Processing 2004, (18 January 2004); doi: 10.1117/12.532455; https://doi.org/10.1117/12.532455
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