Design and implementation of a fully programmable MPEG-2 transport demultiplexer for an STB application on DM642

Ratna M. Reddy; Satish Arora

doi:10.1117/12.525611

19 April 2004 Design and implementation of a fully programmable MPEG-2 transport demultiplexer for an STB application on DM642

Ratna M. Reddy, Satish Arora

Author Affiliations +

Proceedings Volume 5309, Embedded Processors for Multimedia and Communications; (2004) https://doi.org/10.1117/12.525611
Event: Electronic Imaging 2004, 2004, San Jose, California, United States

Abstract

The DM642 is a next generation multimedia processor with a power full C64x DSP core and rich set of peripherals to meet the f requirements of various video applications. The STB is one of the widely used applications in audio-video broadcast arena. The MPEG-2 transport demultiplexer is the core front-end module in the STB application. An Optimized demultiplexer fully programmable architecture and a software implementation using DM642 is presented in this paper. This architecture fully utilizes the CPU power and the support available from the peripherals. The support includes PCR clock recovery, which is very critical for the entire STB application. The data flow and the control flow is tuned optimally in order to minimize the system overheads by reducing data bandwidth requirement and enhancing cache performance. This paper also describes techniques to parse the data efficiently by leveraging on 32-bit instructions and 64-bit load/store data access provided by the advanced C64x architecture. The benchmarks of the demultiplexer with a few typical transport streams are presented at the end.

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Ratna M. Reddy and Satish Arora "Design and implementation of a fully programmable MPEG-2 transport demultiplexer for an STB application on DM642", Proc. SPIE 5309, Embedded Processors for Multimedia and Communications, (19 April 2004); https://doi.org/10.1117/12.525611

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