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1 July 2004 Stress-induced birefringence in silicon-on-insulator (SOI) waveguides
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We show that stress engineering can be used to adjust the SOI waveguide birefringence to the stringent polarization tolerances expected of commercial devices, using only standard silicon processes. With decreasing device dimensions and high index contrast the waveguide birefringence becomes increasingly sensitive to device geometry. As a result, it is almost impossible to eliminate waveguide birefringence by adjusting waveguide profile alone. This paper presents, for the first time, a systematic study of the stress-induced birefringence of SOI waveguides. Through full-vectorial finite-element simulations, we investigate the variation of stress-induced birefringence with waveguide core and cladding geometries. It is found that the stress-induced birefringence is determined by the waveguide cross-section, the upper cladding layer thickness, and film stress levels. We develop a waveguide model that predicts the total waveguide birefringence and guides the post-fabrication processing steps. An experimental demonstration of a polarization insensitive SOI arrayed waveguide grating (AWG) demultiplexer is presented. The polarization dependent wavelength shifts measured experimentally agree well with the simulations.
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Winnie N. Ye, Dan-Xia Xu, Siegfried Janz, Pavel Cheben, Andre Delage, Marie-Josee Picard, Boris Lamontagne, and N. Garry Tarr "Stress-induced birefringence in silicon-on-insulator (SOI) waveguides", Proc. SPIE 5357, Optoelectronic Integration on Silicon, (1 July 2004);

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