30 August 2004 A focal plane normal-flow measurement chip
Author Affiliations +
In this paper, we present the algorithm and operation of an aVLSI chip that can extract normal optical flow by using the gradient approach without interfering with the imaging process. This approach is feasible for scaling to larger arrays without affecting the processing or the processing area. Our system has a 92 x 52 photosensitive array of APS pixels at the core with processing circuits on the periphery. We discuss the approach and the different blocks in the design and then demonstrate the working of the individual blocks and of the system as a whole. The chip outputs the image, the spatial and temporal gradients and the normal flow at the read-out frame-rate with no penalty to the imaging process. The chip occupies an area of 4.5 mm2 and consumes 2.6 mW (at Vdd = 5V). Once normal flow is obtained, the chip can be used to compute focus of expansion, time to contact and many other motion properties of images that can be used to control robots. Tracking systems can use the velocity and segmentation of moving objects can be realized using motion discontinuity.
© (2004) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Swati Mehta, Swati Mehta, Ralph Etienne-Cummings, Ralph Etienne-Cummings, } "A focal plane normal-flow measurement chip", Proc. SPIE 5406, Infrared Technology and Applications XXX, (30 August 2004); doi: 10.1117/12.544217; https://doi.org/10.1117/12.544217


A 20 Mfps high frame depth CMOS burst mode imager...
Proceedings of SPIE (February 19 2017)
High-resolution focal plane image processing
Proceedings of SPIE (October 09 2001)
256 x 256 CMOS active pixel image sensor
Proceedings of SPIE (April 09 1995)
High-frame-rate image acquisition system
Proceedings of SPIE (October 13 1994)

Back to Top