For 157 nm lithography the pellicle material will be most probably a 800 μm thick inorganic (fluorine doped fused silica) plate instead of a standard thin (~ 1 μm) organic (polymer) film. The thickness of the pellicle makes it an additional optical element in the 157 nm exposure tool. This puts tight requirements on the optical properties of the pellicle. One of the largest challenges is to control the pellicle induced overlay errors that result from small variations in pellicle flatness. A local tilt of 12 μrad already introduces an image displacement of 1 nm. This paper deals with the theoretical understanding of the pellicle indued overlay errors. It shows the relation between offline pellicle flatness measurements and exposure tool overlay performance. Two potential solutions are presented to obtain the pellicle within the desired overlay specification. System overlay corrections in combination with a new mounting strategy based on 'correctable pellicle shapes' seem to make the desired overlay specification (≤ 1 nm) feasible. The proposed 'one-dimensional' pellicle shape seems to be very promising. Distortion data, as obtained from exposures on a 193 nm system with and without pellicle, indicate that the proposed solution for automatically and fully correcting for a non-flat pellicle is feasible.

The Aerial Image Measurement System (AIMS) for 193 nm lithography emulation has been brought into operation worldwide successfully. Adjusting optical equivalent settings to steppers/scanners the AIMS system for 193 nm allows to emulate any type of reticles for 193 nm lithography. The overall system performance is demonstrated by AIMS measurements at 193 nm wavelength on binary chrome masks and phase shift masks. Especially for evaluation of 65 nm node lithography performance process window results will be discussed. An ArF excimer laser is in use for illumination. Therefore a beam homogenizer is needed to reduce the speckles in the laser beam and ensure a similar illumination uniformity as the longer wavelength systems, 248 nm and longer, using an arc source. A new beam homogenizing technique will be presented and illumination results compared to the current solution. The latest results on enhanced illumination uniformity exceed the current performance. A newly developed hybrid objective for high resolution imaging is tested for use of high resolution imaging in order to review defects and investigate repairs which do not print under stepper equivalent optical settings. An outlook will be given for extension of 193 nm aerial imaging down to the 45 nm node. Polarization effects will be discussed.

Process control in photomask manufacturing is crucial for improving and maintaining optimal yields. The LWM270DUV critical dimension (CD) measurement system is the first tool ever designed for photomask manufacturers that combines both UV (365 nm wavelength light) and DUV (248 nm wavelength light) for CD measurements. UV light illumination was integrated into the LWM270DUV to allow photomask makers to perform after etch inspection (AEI) on DUV resists minimizing exposure effects. The increased resolution of UV illumination allows for measurement of features as small as 300 nm. Improved measurement algorithms as well as improvements in the illumination system have reduced the uncertainty of measurements resulting in improved performance. This paper details recent measurement results of various feature types on different substrate types using UV transmitted light.

The paper presents the description of the new Virtual Scanning Algorithms (VSA), providing sub-pixel resolution. VSA are the algorithms developed specially for EM-6029B (Fig. 1) and EM-6329 (Fig. 2) die-to-database reticle and photomask inspection systems of "Planar" concern (KBTEM-OMO). For the providing of the effective building in of these algorithms to the inspection system, has being created the special two-levels dynamic model of optical image. The paper presents also the building principles of this model. This model allows, on the one hand, to perform the precise alignment of optical image (collected from the reticle) wit a reference image (generated from the design data), and on the other hand -- to perform the analysis of optical image to get optimum mutual position of the digitization grid of the inspection system and detected defects position. VSA calculate the second level of this model. Both the VSA and the second level of dynamic model of optical image are presented the Virtual Scanning sub-System (VSS). VSS allows to increase the detection capability of automatic reticle inspection system by means of achievement sub-pixel resolution. The paper shows, that during the detection of semi-transparent defects, VSA allow, in particular, to get maximum available amplitude contrast of the CCD-signals on the image model. Accordingly, VSA allow also the inspection system to work without using maximum sensitivity settings with the same detection capability. As a result is the reduction of the risk of false or nuisance defects detection, while keeping maximum sensitivity to printable defects. The VSS design and in-house test results are discussed.

A mask making process is the result of data preparation (e.g., bias), patterning and etch. The effect of these steps can be simulated starting from a circuit design. The purpose of this paper is to determine the transfer function for a production flow of a mask, describing the transition from the design to the finished reticle. The simulation results will be compared with actual measurements. 1D measurements of a mask, as shown for example in Ref.[1], provide a lot of useful information. The fingerprint that a writing tool leaves on the experimental result actually makes it possible to determine if the reticle is produced with an e-beam writer or an optical laser tool. From the deviations from the nominal value the "effective" spot size of the laser tool can be determined. In case an e-beam writer is used, the performance of the e-beam proximity correction in use becomes apparent. The mean-to-target offset can be resolved if no data biasing is performed. From SEM pitures of the reticle the 2D corner rounding effects can be determined from the combined influence of the spot size, scattering (in case of an e-beam writer) and data biasing. Global sizing can be resolved from 2D measurements. If the pattern bias is performed for each individual feature it is included in the rounding. Sufficient data about sizing, etch bias and spot size can be obtained if SEM pictures are taken from several critical sites on the reticle. For example, dense lines/spaces or contacts/dots constitute the minimum objects to be printed. Recent reticles ordered at IMEC include a monitor structure. Among other features, this performance monitor contains dots and contact holes with sizes between 90 nm and 250 nm with additional serifs at the corners. The serifs have sizes of 10 - 40 nm in 10 nm steps. All feature sizes are specified at 1x unless otherwise indicated. They are extending multiples of 10 nm from the corner position. In our work we assessed the integrity of varying serifs on dots and contact holes of 120 nm to estimate the "effective" spot size and etch bias of a reticle. The contact holes are simulated with a spot size of 80 nm and an etch bias of 70 nm. SEM pictures are in agreement with the etch bias as seen from 1D results. One might consider that another blurring function and bias condition will give the same result. A case study shows that by interchanging these parameters the resulting mask pattern yields different results. The simulations show that the SEM pictures of the 2D structures within the monitor pattern contain enough information to extract the transfer function. In some situations it might be impossible to measure 2D features (e.g., additional measurements at mask shop become too expensive; a pellicle already mounted impedes mask assessment at the wafer fab; too limited time in contrast with the lengthy procedure to extract feature contours from images; etc.). In such case 1D measurements obtained from the mask shop can already allow to estimate the etch bias. Also, the spot size can be determined from the printed minimum feature size.

The paper proposes a method to mitigate the ever tighter requirements for mask CD uniformity. The basic idea is simple. As the mask error enhancement factor (MEEF) soars at low k1 values with pitches getting smaller it sould be possible to alleviate the problem given there is a way to increase the pitch. For highly repetitive layouts like cell fields of DRAMs the solution is rather straightforward. One has to find the next larger pitch in the layout and divide the layout into sublayers. Those sub-layers are written into separate reticles for subsequent exposure. In consequence, the method will lead to double exposure in case two reticles have been generated. The simplest example is an array of lines and spaces with equal pitch. An almost trivial example, a regular square contact array, results in two equal checkerboards. The diagonal (1,1) in the square array is the second smallest pitch in a square array. To fully cover a square array requires two checkerboards separated by the base vector (1,0) of the original lattice. These two checkerboards will subsequently be printed by a double exposure. It is obvious that the pitch can be increased by choosing larger displacements at the cost of more sub-layers. Doubling the pitch, which makes manufacturing of masks a lot easier, would require four reticles, hence four exposures. The edges and corners of regular arrays print significantly different as the MEEF is position dependent. It can be expected that increasing the pitch is also beneficial in the sense that it levels off the MEEF variance. It will be investigated how much the common process window increases. The applicability of said method is obvious for memory layouts. It can however, be extended to semi-periodic or even random layouts. Its value depends primarily on the density of the layout and on the k1 value. Its potential uses comes in only at the leading edge of lithography where the MEEF starts to become a real pain for the mask maker. Simulation results will be shown as well as calculations of the process latitude before and after dividing the layout.

The data volumes of individual files used in the manufacture of modern integrated circuits have become unmanageable using existing data formats specifications. The ITRS roadmap indicates that single layer MEBES files in 2004 exceed 200 GB threshold, worst case. OASIS, the new stream format developed under the sponsorship of SEMI, has been approved in the industry-wide voting in June 2003. The new format that on average will reduce the file size by an order of magnitude, enables to streamline data flows and provides increased efficiency in data exchange. The work to implement the new format into software tools is in progress. This paper gives an overview on the new format, reports results on data volume reduction and is a report on the status and benefits the new format can deliver. A data flow relying on OASIS as the input and transfer format is discussed.

We reported the Guideline (Ver.1) of Reticle Data Management (RDM) Activity in 2001. While focusing on SoC (System on Chip) business, we have improved the efficiency in design technology, mask manufacturing and wafer manufacturing. Especially, these subjects have been the lithography costs including a reticle cost, a shorter life cycle of products, more difficult techniques, a lower cost and shorter total TAT from design to chip shipping. The Guideline Ver1.0 announced the standardization of interface contents from design to mask manufacture, and to wafer manufacture as well. According to the Guideline Ver2 in 2003, RDM activity has developed the optimization of a new engineering chain management that added the pattern data and the linkage to EDA. The unique characteristics of standardization proposed in Ver2 is that apart from standardization of the data format of the pattern data itself, expression of referencing pattern data and other additional information that are associated in case pattern data is utilized should be standardized. The difference between "expression" and "format" could be understood. These expressions include knowledge, view, property for retrieve, annotation, reference and relation about pattern data. These relations will be considered from a user's view of utilizing pattern data. The purpose of this expressions is to combine various standards relating to reticle. For example the linkage between RDM and UDM that is standardization of a data model relating to EDA tools and their applications is assumable. These two layers of standardization will make creative associations of applications possible.

This paper presents the "2003" update of the SEMI Standards Task Force on Mask Qualification Terminology, covering of the progress made since the BACUS Photomask 2002 Symposium. The focus of the past 2 years has been on terminology for two-dimensional mask metrology. The main contents of the document is discussed, including the general approach for 2D qualification based on area assessment, together with its application to corner rounding, line-end shortening, contact hole measurement. The concept used is the same as used for the 1D terminology in the published proposed standard PR007-00-0302 [1]: together with a definition, mandatory and optional information are listed to minimize the ambiguity in a quality assessment result; distinction is made between true and measured value. The work also suggests how to take into account the actual 1D quality to deliver 2D assessment results that can be compared to those of other mask fabrication processes, for example in benchmarking exercises, and how overlay between nominal and actual features can be controlled. In Q2 of 2003 a survey has been issued, with the main intention to quantify the interest in the achieved result of this work and help to determine the further steps of the initiative. The feedback obtained through this survey is discussed. The first results of defining phase shift terminology are also presented.

After the early mask making during the 1960s in Dresden has been discussed at the 19^th EMC now the view is focused to the further mask making efforts in Dresden, where the leading East German labs for research and development of microelectronics had been located. The mask making process developed continuously, but one can recognize some different periods. First a three-stage process realized artwork originals -- reticles -- masks. Then a two-stage process realized reticles-masks. In the end a one-stage process realized only the reticles which were applied to the wafers by means of a waferstepper. Technology and equipment of the mask processes were developed in cooperation with other East German companies such as Carl Zeiss Jena. Some examples for microlithographic equipment are given. Finally, late in the 1980s, a high technology equipment existed in Dresden which met the microlithographic challenges of a Megabit DRAM technology: chip size of about 13 mm x 5 mm, minimum features of about 1 μm. Mask making occured with the e-beam writer ZBA21, mask application was carried out with the waferstepper AUR. The specific parameters are listed and the arrangement of the chip design (1MbitDRAM chip U61000) on the reticle is discussed with respect to the image field conditions. Some pictures show the ground plan of the reticles and the reticle masks, which were made on chromium coated glass blanks 125 mm x 125 mm.

The reduction in feature size below the exposure wavelength, the requirement for high yields, the expectation for consistent cycletime and shipment to mix, all mean that the reticle industry must be like advanced wafer fabrication centers. Due to the lower output of write tools versus steppers, and the fact that a reticle is a lot of one instead of 25 or 50 wafers as well as the need to match ship data to Fab ramp, the reticle line monitoring strategy must be optimized for small sample size. The use of tool time and alternative inspection strategies can lead to the early detection of problems. Because every reticle is a customer specific design, the monitoring strategy takes on a new look compared to the Fab. We have organized the AMTC to resemble a wafer fab. We have a dedicated Integration group that works with the customers and technologists, to monitor the needs of the customers and then drive the development programs that improve reticle capability. We have dedicated yield team to identify and classify the yield loss mechanisms and define probable causes. The teams then work with the Process owners to fix the source of yield loss and track the corrective actions. All sources of variations must be modeled and then sources of errors reduced to levels below the tool specification. The manufacturing organization has all the process and tool experts to focus on Pilot Line and Development tasks to meet the advance needs of our customers. With the organization in place we can then develop the methods based on Reticle and Fab manufacturing to best control the line and provide development with manufacturing cycle times.

Mask Blanks for EUV Lithography require a lot of new properties and features compared to standard COG blanks. Starting from completely new low thermal expansion substrate materials with significantly improved surface quality over multilayer coatings for EUV reflection, buffer layers, up to new absorber layers with improved dry etching and inspection properties. This paper introduces in the special features of Low Thermal Expansion Materials (LTEM), their manufacturing and the special metrology for the Coefficient of Thermal Expansion (CTE). We will look into some details of polishing methods for much better flatness of the substrates. The process and the metrology of low defect EUV multilayer coatings will be elucidated and some aspects of this will be explained in detail. In addition we will present new results from no-chrome alternative absorber materials.

Currently, EUV lithography targets for sub-50 nm features. These very small feature sizes are used for reflective illumination and impose great challenges to the mask maker since they do not allow a simple downscaling of existing technologies. New material combinations for absorber and buffer layer of EUV masks have to be evaluated and fundamental material limits have to be overcome. We report on optimized absorber-stack materials and compare in particular the performance of chrome and tantalum nitride for such small nodes. Tantalum nitride shows similar or even better properties than standard chrome, above all with respect to etch bias. Further investigations have to be done but this material is a promising candidate for feature sizes in the sub-50 nm range.

As the options for exeperimental studies are still limited, a predictive simulation of EUV lithography (extreme ultraviolet lithography) is important for a better understanding of the technology. In particular, the simulation of defective EUV masks is a fundamental task because of the significant impact of certain defects on the lithographic process. The description of such a defective mask is one of the most critical issues for the modeling of EUV lithography. A new model for the simulation of defects inside the multilayer of an EUV reflective mask, developed at Fraunhofer IISB, is used for the presented study. The model consists of a combination of a rigorous electromagnetic field (EMF) computation and an analytical thin film computation. Compared to other methods, such as fully rigorous EMF simulations, this new approach leads to a significant reduction of computation time and memory requirements. The model can be applied to two and three dimensional defects and masks. This paper will present a detailed study of the impact of EUV mask defects on the near fields, the aerial images, and the process windows. Typical mask structures, e.g. 3D contact holes and 2D lines with various defects, are investigated. Defect parameters, such as the defect position with respect to the main feature to be imaged, the defect height, the defect FWHM (full width at half maximum), and the number of compressed layers inside the multilayer are varied. The important defect parameters and their critical ranges are identified using the new simulation method. The impact of these parameters on the image CD and the image position are demonstrated.

The International Technology Roadmap for Semiconductors for Extreme Ultraviolet Lithography (EUVL) places strict requirements on the quality and flatness of the substrate and patterned mask. The SEMI EUVL Mask Substrate Standard (SEMI P37) specifies that the substrate frontside and backside nonflatness be no more than 50 nm peak-to-valley (p-v). Recent technological advances in polishing and finishing techniques have placed the 50 nm p-v specification within reach. A key ingredient in the development of EUVL is understanding and characterizing the clamping ability of the electrostatic chuck and the resulting effect on the flatness of the chucked mask. By implementing the shape of a representative EUVL mask surface into a numerical model, the effect of electrostatic chucking on the shape of the mask was determined. Legendre polynomials have been identified as an effective and efficient means of representing EUVL mask surface shapes. Finite element (FE) models have been developed to utilize the Legendre coefficients as input data to define the surfaces of an EUVL mask. The FE models were then used to determine the clamping response of the mask. In particular, the maximum mask-to-chuck gap within the Flatness Quality Area and over the entire mask has been tracked as a function of clamping pressure for representative EUVL surfaces. One of the important parameters in this study was the chuck's mechanical stiffness (comprised of the thickness and modulus). The flatness of the EUVL mask also depends on the intrinsic stress and thickness of the multilayer and backside layers. The results in this paper show that the recent advances in EUVL substrate polishing have resulted in masks that can be chucked relatively flat.

One of the most critical steps for photomask CD off-target is the patterning of the mask. Here the instability of the dry etch process contributes directly to the stability of the CD value. The increasing demands on high-end masks cause a narrowing of both mask CD off-target and CD uniformity specifications, and accordingly the process stability has to be improved to fulfill these criteria. In this work we investigated the correlation between hardware parameters, basic etch process parameters and the corresponding CD mean-to-target value. Correlations between CD mean-to-target and Cr etch rate as well as effects of chamber seasoning after wet cleans are discussed.

Alternating phase shift masks (alt. PSM) are emerging as an attractive resolution enhancement technique. Although alt. PSM is a technique that clearly improves resolution, there are some inherent disadvantages that are induced by the manufacturing process. Intensity imbalance, phase non-uniformity and quartz defects diminish the performance of an alternating PSM. Many of these disadvantages can be a result of imprecise quartz etching. By implementing a transparent etch stop layer, these deficiencies can be minimized. The etch stop layer ensures that all of the quartz is etched and that over-etching will not induce a phase-shift error. This produces improved phase uniformity and eliminates quartz defects. The etch stop layer also has the ability to improve the image intensity balancing by reducing the intensity through the zero degree region. This paper discusses the advantages and manufacturability of alt. PSM using a transparent etch stop layer.

We report on the metrological characterization of photomask standards which were developed within a project with industrial partners in Germany to be used as reference standards for different type of linewidth or CD metrology instruments. It was the objective to develop high quality mask standards which would allow to perform CD calibrations with smallest possible uncertainties and to use the standards within the project consortium as well as to make the standards available to interested third parties. The design of the standards consists of line as well as box structures, isolated as well as group patterns, each in different tones and in x/y-orientation. The structures are all placed on a regular measurement grid to be easily accessible by automated CD metrology systems. Target CD values are going down to 0,2 μm or even below with smallest CD steps of 20 nm and line to space ratio within groups is varied between 1:1 and 1:5. Additionally, there are larger CD structures and clear fields and different pitch structures on the mask. This contribution will concentrate on the description of the methods and instrumentation used at the PTB for investigation and calibration of the standards. Different methods of optical transmission microscopy as well as low energy scanning electron microscopy and scanning probe microscopy were applied which all were developed to provide traceable linewidth calibration values. This implies, that suitable physical models for the interaction of the different probes with the photomask structures had to be developed for a meaningful interpretation of the measurement signals for all type of CD metrology methods. The analysis also has to take into account the influences of structure imperfections, like edge slope and line edge roughness.

Immersion lithography has been proposed as a method of improving optical lithography resolution to 50 nm and below. The premise behind the concept is to increase the index of refraction in the space between the lens and wafer through the insertion of a high refractive index liquid in place of the low refractive index air that currently fills the gap. This paper presents three studies related to potential problem areas for immersion lithography. The first study investigates the entrainment of air as liquid flows over features in the wafer topology. Bubbles are undesirable because they introduce changes in the index of refraction in the optical path that can lead to imaging errors. The second investigation examines liquid heating due to the absorption of the incident energy by the fluid as well as heat transferred from the exposed wafer and viscous heating. This temperature elevation can lead to changes in the liquid's index of refraction which may lead to optical degradation of the fluid. The final investigation examines the potentially significant normal and shear stresses induced on both the lens and wafer surface due to the increased viscosity and density of the liquid as compared with air. These mechanical loads may cause the lens to distort or shift in its mounting. This paper presents the results of the numerical thermal, flow, and structural simulations used to analyze these various critical issues.

In June 2000 ago the company Accretech and LEEPL corporation decided to develop an E-beam lithography tool for high throughput wafer exposure, called LEEPL. In an amazing short time the alpha tool was built. In 2002 the beta tool was installed at Accretech. Today the first production tool the LEEPL 3000 is ready to be shipped. The 2keV E-beam tool will be used in the first lithography strategy to expose (in mix and match mode with optical exposure tools) critical levels like gate structures, contact holes (CH), and via pattern of the 90 nm and 65 nm node. At the SEMATECH EPL workshop on September 22^nd in Cambridge, England it was mentioned that the amount of these levels will increase very rapidly (8 in 2007; 13 in 2010 and 17 in 2013). The schedule of the production tool for 45 nm node is mid 2005 and for the 32 nm node 2008. The Figure 1 shows from left to right α-tool, the β-tool and the production tool LEEPL 3000. Figure 1 also shows the timetable of the 4 LEEPL forum all held in Japan.

Electron beams have unlimited resolution, for practical purposes in lithography. The historical limitation of e-beam lithography is throughput. There are two reasons for the throughput limitation in present-day probe forming systems: (1) E-beam lithography is a serial process, in contrast to optical lithography, which exposes an entire chip in one flash or scan. (2) Useful writing current is limited by Coulomb scattering among beam electrons, which degrades resolution. Many examples exist of systems which add parallelism to the exposure process by using multiple pixels per flash. These include variable shaped beams, cell projection, e-beam projection, and many multibeam systems. Invariably, the Coulomb interaction has imposed a practical upper limit on writing current for a given resolution. There exists a class of system, called a distributed system, which is both highly parallel, and which is not limited in usable writing current by the Coulomb interaction. The purpose of this study is to survey the historical throughput limitation of e-beam lithography, and assess the hope for significantly improving throughput by using distributed system concepts.

Contact layers of the DRAM manufacturing process can be printed well using alternating phase-shifting masks. State-of-the-art mask making tools have sufficient performance to manufacture defect free contact masks. The enlarged process window compared to conventional masks allows to shrink the contacts size or to substitute advanced scanners by older generation steppers for contact layer patterning. Using older generation exposure systems may cause problems originating in worse lens aberration performance. A method will be described how to overcome overlay problems by applying a specifically designed OL measurement target.

The aim is to apply e-beam lithography for second level imaging of Alternating Phase Shift Masks (altPSM) in the 65 nm node and below. Difficulties due to charging effects arise when exposing areas where the chromium absorber has been cleared away. In order to achieve correct pattern placement, the commercial water-soluble conductive ESPACER 300Z top coat from Showa Denka is applied in combination with chemically amplified resist of type FEP171. The paper describes the method and algorithm to test the efficacy of the material and the technological steps taken to avoid or reduce charge effects. The obtained overlay accuracy proves the ESPACER/FEP171 combination a promising approach for future altPSM manufacturing.

Nanoimprint was performed in very thin layers of polystyrene (PS) in order to define a mask with minimum CD loss for a subsequent etch process at minimum etching time for opening of the mask windows after imprinting. The initial polymer layer thickness was chosen as to fill the stamp cavities with nearly no surplus of polymer material. The residual layers after imprint were in the range of 50 nm and could be cleared at 50% overetch within 90 s in an oxygen RIE step. As there was not enough polymer material available for a complete filling of the cavities when a residual layer remains, filling defects occurred. High imprint temperature and thus low viscosity led to formation of deep defects in the imprint and thus the mask to be formed by embossing. Lift off experiments revealed that within the defective regions the remaining polymer layer thickness was smaller than the imprinted residual layer. In order to avoid such mask defects the imprint temperature had to be reduced.

the Leica SB350MW 50keV shaped-beam e-beam lithography tool was used to write large-area 1X templates applicable in Step and Flash Imprint Lithography (S-FIL). This paper describes how information from the pattern analysis can be used to define the ZEP7000 resist exposure optimization technique for the SB350 MW tool together with the Motorola template pattern transfer process to obtain final template images in the transparent template. As a result of the complete process, well-resolved trenches measuring 33 nm and contacts as small as 44nm were obtained. Further improvements in the resist patterning will be possible by an adaptation of our standard proximity corrector (currently used in the 90 nm node maskmaking) with a high resolution upgrade.