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6 December 2004 Contact and via hole mask design optimization for 65-nm technology node
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Abstract
For advance semiconductor manufacturing, imaging contact and via layers continues to be a major challenge for 65nm node lithography and beyond. As a result, much effort is being placed on reducing the k1 for hole patterning to the range of 0.35 - 0.40. However, the consequences of operating at such low k1 values are a small DOF, reduced exposure latitude, and high MEF. To achieve this level of k1, it is necessary to employ resolution enhancement techniques that require phase shifting reticles and/or strong off axis illumination. Recent results show that by using strong off axis illumination to achieve resolution for the dense pitch contacts and by adding subresolution scattering bars for the semi dense to isolated, it is possible to achieve contact hole imaging through the entire pitch range.[1] To generate such reticle designs, the current technique commonly used is to apply a set of rules to define the assist features (scattering bars, anti-scattering bars, non-printing assist features, phase shifted and non-phase shifted) through pitch, whether for binary or attenuated phase shifting reticles. But this approach is not capable of deriving correct assist feature placement for the entire range of pitches and for the randomly placed contact holes that occur in actual device patterns. The objective of this work is to define the necessary methodology for creating binary, attPSM, ternary HTPSM, and CPLTM reticle designs containing assist features for contact patterns that are representative of actual device patterns that will be used in production at the 65nm node and contain effectively randomly placed contacts over a wide range of pitches from dense to isolated. To overcome the problem of deriving assist features for randomly placed contacts at pitches from semi-dense to isolated, IMLTM Technology was used which is a modeling algorithm based on mapping out the interference that occurs at the image plane as a result of the proximity effects of the target contact pattern.[2,3] This technique provides a model-based approach for placing all types of assist features for the purpose of enhancing the resolution of the target pattern and it can be applied to any reticle type including binary, attPSM, altPSM, ternary HTPSM, and CPL. Using reticle designs created from implementing automated algorithms based on IML, wafer printing results are measured and we examine the critical issues related to contact layer RET's including through pitch process windows, overlapping process window, controlling side lobe printing, contact patterns with odd symmetry, forbidden pitch regions, printing of the assist features, MEF, and reticle manufacturing constraints.
© (2004) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Douglas Van Den Broeke, Xuelong Shi, Robert Socha, Tom Laidig, Uwe Hollerbach, Kurt E. Wampler, Stephen Hsu, J. Fung Chen, Noel P. Corcoran, Mircea V. Dusa, and Jung Chul Park "Contact and via hole mask design optimization for 65-nm technology node", Proc. SPIE 5567, 24th Annual BACUS Symposium on Photomask Technology, (6 December 2004); https://doi.org/10.1117/12.568692
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