9 December 2004 Current stress metastability in a-Si:H thin film transistors
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Abstract
In this paper, we investigate the threshold voltage (VT) instability in a-Si:H TFTs subject to constant current stress. The gate voltage under such conditions continuously adjusts to keep the drain current constant. As such, existing voltage stress models fail to predict the resulting VT-shift. We propose a physically based model to predict VT-shift under current stress. The model follows a power law assuming that the VT-shift under moderate current stress is due to defect state creation in a-Si:H bulk and interfaces. Good agreement between simulation results and experimental data is obtained for various levels (2μA-15μA) of stress current at both room and elevated (75°C) temperatures.
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Afrin Sultana, Kapil Sakariya, Arokia Nathan, "Current stress metastability in a-Si:H thin film transistors", Proc. SPIE 5578, Photonics North 2004: Photonic Applications in Astronomy, Biomedicine, Imaging, Materials Processing, and Education, (9 December 2004); doi: 10.1117/12.605363; https://doi.org/10.1117/12.605363
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