28 February 2005 1536x1536 silicon backplane for optical switching using dynamic holography
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This paper presents the design of a 1536 x 1536 pixel silicon backplane for dynamic holography in an all-optical 64 x 64 switch. Each pixel consists of two 6T-SRAM cells, a 4-to-1 multiplexer, and a high voltage buffer. A special driving technique using digital driving of the ITO and reflector devices has enabled the chip to control the voltage across the liquid crystal sandwich with zero DC bias. The chip has been fabricated in a 0.25 μm 2.5V/5V with a special high reflectivity top metal process. The pixel dimensions is 10.8 μm X 10.8 μm with a 0.6 μm spacing between the top metals. The total chip area is 21.9 mm X 21.7 mm. At typical driving frequencies of 10 KHz the chip consumes only 100 mW.
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Alireza Moini, Alireza Moini, Daryoush Habibi, Daryoush Habibi, Guoqiang Mao, Guoqiang Mao, } "1536x1536 silicon backplane for optical switching using dynamic holography", Proc. SPIE 5649, Smart Structures, Devices, and Systems II, (28 February 2005); doi: 10.1117/12.581813; https://doi.org/10.1117/12.581813

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