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16 February 2005 Implantable CMOS front-end for nerve-signal sensors
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An implantable analog front-end for human nerve signal sensors is presented. The front-end is composed of a low-noise, high-gain pre-amplifier and an analog-to-digital converter (ADC) for quantizing the recorded nerve signal. The front-end is implemented in a 0.35um CMOS technology. The circuit draws 196uA from a 1.8V supply, thus consuming approximately 350uW excluding bias circuitry and buffers. As the signal provided by the nerve signal only has a magnitude of a few microvolts, the pre-amplifier intrinsic noise has to be minimized in order to retain a sufficient signal-to-noise ratio (SNR). A two-stage design for achieving an overall gain of 74dB is employed. For low thermal noise, the first stage is biased at a relatively high current and employs MOS transistors (MOSTs) biased in the weak inversion region. The chopper modulation technique is utilized for shifting low frequency 1/f-noise out of the signal band leaving thermal noise dominant in-band. The measured noise is approximately 7nV/sqrt(Hz) input referred, for a chopping frequency of 20kHz, while the measured gain is 72.5dB over a 4kHz bandwidth. The measured power supply rejection ratio (PSRR) is above 90dB and the common-mode rejection ratio (CMRR) exceeds 105dB inband. The implemented ADC is of the sigma-delta type, and uses a third order continuous-time loop-filter. The loop-filter is implemented using Gm-C integrators, and uses CMOS only for the transconductor implementation. The measured resolution of the manufactured ADC is 10 bits and features a dynamic range (DR) of 67dB at a sampling rate of 1.4MHz.
© (2005) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Jannik Hammel Nielsen and Erik Bruun "Implantable CMOS front-end for nerve-signal sensors", Proc. SPIE 5651, Biomedical Applications of Micro- and Nanoengineering II, (16 February 2005);


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