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8 March 2005 SHRED: a CPU scheduler for heterogeneous applications
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Proceedings Volume 5683, Embedded Processors for Multimedia and Communications II; (2005) https://doi.org/10.1117/12.592143
Event: Electronic Imaging 2005, 2005, San Jose, California, United States
Abstract
General purpose workstations must support a wide variety of application characteristics; but it is hard to find a single CPU scheduling scheme that satisfactorily schedules processes from all types of applications. It is particularly difficult to get periodic deadline-driven continuous media processes to satisfactorily co-exist with others. A number of schemes have been proposed to address this issue, but these all suffer from one or more of the following limitations: i) unacceptable inefficiency, ii) non-determinism (i.e. introducing significant burstiness or jitter), iii) inability to explicitly support deadlines (so that deadlines may be missed even when the CPU is underloaded). This paper presents “SHRED (SHaretokens, Round-robin, Earliest-deadline-first, Deferred-processing)” -an efficient, proportional-share, deterministic, scheduling scheme that enables periodic deadline-driven processes to meet their explicit deadlines wherever possible, and degrades gracefully and adaptively when this is not possible. The scheme simultaneously ensures that non-deadline processes always obtain their fair share of CPU time whether in conditions of underload or overload. For experimental evaluation, a prototype of SHRED has been developed by replacing the Linux standard scheduler with the SHRED scheduler. The prototype has been evaluated against the standard Linux scheduler for various parameters and also against two proportional-share schemes, namely Stride and VTRR scheduling, for its overhead and its effect on jitter.
© (2005) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Oveeyen Moonian and Geoff Coulson "SHRED: a CPU scheduler for heterogeneous applications", Proc. SPIE 5683, Embedded Processors for Multimedia and Communications II, (8 March 2005); https://doi.org/10.1117/12.592143
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