6 May 2005 Resist sensitivity and thickness-based beam count optimization for parallel low energy E-beam exposure systems
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Proceedings Volume 5751, Emerging Lithographic Technologies IX; (2005); doi: 10.1117/12.599723
Event: Microlithography 2005, 2005, San Jose, California, United States
Abstract
Proximity effects during electron beam exposure have been kept under control by using sophisticated correction algorithms and software, combined with a strategy which aims at increasing the electron beam energy to 50 keV and 100 keV. At these energies, the proximity effects are more uniform and provide a situation where they are easier to correct. However, as feature sizes shrink, and the pattern density increases, this task becomes extremely complex, since tolerances to pattern definition errors are becoming more restricted. An alternate approach is to move to lower electron energies where proximity effects become negligible. Several programs are underway to develop massively parallel electron beam (MPEB) writer systems that have greatly reduced energy in the ≤5keV regime. Selection of the electron beam energy becomes critical below 10 keV, since the tolerance window where proximity effects are indeed negligible is very small. A shot noise model has been elaborated providing minimum exposure doses required for resists at technology nodes of 45 nm and below. These doses increase rapidly with reducing linewidth and impose a minimum number of electron beams for MPEB systems in order to be able to pattern a surface corresponding to a standard full field 6 inch reticle in a reasonable time, and to directly pattern 300 mm wafers at rates of 5, 50 and 100 wafers per hour. An overall set of results is obtained indicating minimum number of electron beams and electron beam current.
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Jacques Beauvais, Eric Lavallee, Dominique Drouin, Andrew Zanzal, Prasad Kelkar, "Resist sensitivity and thickness-based beam count optimization for parallel low energy E-beam exposure systems", Proc. SPIE 5751, Emerging Lithographic Technologies IX, (6 May 2005); doi: 10.1117/12.599723; https://doi.org/10.1117/12.599723
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KEYWORDS
Electron beam lithography

Electron beams

Line edge roughness

Semiconducting wafers

Photomasks

Lithography

Line width roughness

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