10 May 2005 Novel two channel self-registering integrated macro inspection tool
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After Develop Inspection (ADI) of every wafer in a lot is quite appealing, since that provides an opportunity to rework defective wafers instead of scrapping them later on. To achieve this level of inspection in manufacturing, automated macro inspection tools with higher throughput, better detection sensitivity and repeatability are needed. Moreover, such an inspector will have to be located within the Coater Developer track. To have a smaller footprint inspector, one might consider spiral-scan of the wafer surface using an off-axis illumination beam. In product wafers, one comes across Manhattan geometry with L/S patterns that are usually smaller than or comparable to the illumination wavelength. Since the reflectance of such a surface depends on the incident polarization and the pattern orientation with respect to the plane of incidence, the acquired wafer surface image will have dark and bright regions. Occurrence of this type of inhomogeneity in the surface image is referred to as the bow tie effect. The bow tie feature degrades S/N ratio of the acquired image and therefore reduces the inspector’s detection sensitivity. In this paper we will describe a macro inspection tool based on a fast spiral-scan technique that eliminates the bow tie effect by propagating the illumination beam in two orthogonal planes of incidence. In addition, by employing two counter-propagating beams, the tool is shown to have the ability to generate real time defect images that are immune to noise from die-to-die thickness variations, die-to-die alignment errors, and under layer contributions.
© (2005) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Arun A. Aiyer, Arun A. Aiyer, Mark Meloni, Mark Meloni, Andrew Kueny, Andrew Kueny, Mike Whelan, Mike Whelan, "Novel two channel self-registering integrated macro inspection tool", Proc. SPIE 5752, Metrology, Inspection, and Process Control for Microlithography XIX, (10 May 2005); doi: 10.1117/12.599873; https://doi.org/10.1117/12.599873


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