Paper
4 May 2005 Electron beam direct write process development for sub 45nm CMOS manufacturing
J. Todeschini, Laurent Pain, S. Manakli, B. Icard, V. DeJonghe, B. Minghetti, M. Jurdit, D. Henry, V. Wang
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Abstract
Electron Beam Direct Write (EBDW) lithography represents a low cost and a rapid way to start basic studies for advance devices and process developments. Patterning for sub-45nm node technology requires the development of high performance processes. Different alternatives for the improvement of EBDW lithography are investigated in this paper for the ASIC manufacturing on 300mm wafer size. Among them, process development has been tuned for clear field equivalent level to improve both line width roughness by monitoring post applied bake conditions, and both process window by specific design correction. Concerning dark field level, process resolution has been improved by a shrinkage technique.
© (2005) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
J. Todeschini, Laurent Pain, S. Manakli, B. Icard, V. DeJonghe, B. Minghetti, M. Jurdit, D. Henry, and V. Wang "Electron beam direct write process development for sub 45nm CMOS manufacturing", Proc. SPIE 5753, Advances in Resist Technology and Processing XXII, (4 May 2005); https://doi.org/10.1117/12.601616
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Cited by 5 scholarly publications.
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KEYWORDS
Line width roughness

Electron beam direct write lithography

Semiconducting wafers

Electron beam lithography

Electron beams

Coating

Etching

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