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5 May 2005 Investigating a lithography strategy for diagonal routing architecture at sub-100nm technology nodes
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The X Architecture offers the potential to produce smaller and faster integrated circuits through the pervasive use of 45° wirings on the upper metal layers. The X Initiative members have demonstrated its manufacturability and integration-worthiness at the 130nm, 90nm and 65nm process technology nodes. This paper explores the use of off-axis lithography illumination to print 45° diagonal wires at leading technology nodes. The paper also describes the RET strategies employed for the X Architecture and the effectiveness of various illumination sources at various process nodes. Process window and metal wiring CD variation of Manhattan and X Architecture are compared in the simulations using different types of illuminators. Simulation shows that using 193nm light source, Manhattan and X designs can easily be printed with different types of illuminating source in either 90nm or 65nm process node. Silicon test chips at 90nm that include typical X routing patterns are designed to verify the printability of X Architecture wirings. Electrical measurements as well as SEM analysis are conducted and results show that the fidelity of diagonal wirings is as good as traditional Manhattan routings.
© (2005) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Song Li, Ting Chen, Santosh Shah, Ketan Joshi, Kalyan Thumaty, and Narain Arora "Investigating a lithography strategy for diagonal routing architecture at sub-100nm technology nodes", Proc. SPIE 5756, Design and Process Integration for Microelectronic Manufacturing III, (5 May 2005);

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