8 December 2004 The studies of room-temperature electrical resistivity of post-annealed LaNiO3-δ thin film on Si(100)/n by RF magnetron sputtering
Author Affiliations +
Proceedings Volume 5774, Fifth International Conference on Thin Film Physics and Applications; (2004) https://doi.org/10.1117/12.608173
Event: Fifth International Conference on Thin Film Physics and Applications, 2004, Shanghai, China
Abstract
Highly (100)-oriented LaNiO3-δ (LNO) thin film were grown on n-type Si(100) at substrate temperature 200°C with 40% oxygen partial pressure. The as-deposited LNO films are metallic and have a resistivity of ~9×10-4 mΩcm at room temperature (RT) and can be used as the bottom electrode for the fabrication of integrated ferroelectric capacitors on Si. A post-annealing process can decrease the RT resistivity to ~3×10-4 Ωcm at 700°C and yield crack at 800°C.
© (2004) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
X. D. Zhang, Xiang Jian Meng, J. L. Sun, G. S. Wang, Tie Lin, Jun Hao Chu, "The studies of room-temperature electrical resistivity of post-annealed LaNiO3-δ thin film on Si(100)/n by RF magnetron sputtering", Proc. SPIE 5774, Fifth International Conference on Thin Film Physics and Applications, (8 December 2004); doi: 10.1117/12.608173; https://doi.org/10.1117/12.608173
PROCEEDINGS
4 PAGES


SHARE
Back to Top