24 May 2005 Performance of a photonic oversampled sigma-delta quantiser
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In an increasingly digital world, the need for high speed and high fidelity analog-to-digital (A/D) converters is paramount. Performance improvements in electronic A/Ds have not kept pace with demand, hence the need to consider alternative technologies. One such technology is photonics, as it takes advantage of optical sampling, high speed optical switches and low cross-talk interconnects. Optical sampling derives its advantage from the application of ultra low timing jitter (<100fs) mode locked lasers utilised to provide high speed clock pulses. In this paper we report on our investigation into the feasibility and simulated performance of a photonic sigma-delta quantiser. The first-order sigma-delta architecture requires the functional elements of a subtractor, comparator and delay. We constructed optoelectronic versions of a subtractor and a comparator using self-electro-optic devices (SEED) based upon multiple quantum well (MQW) p-i-n devices. Comparator and subtractor operation were experimentally demonstrated and the inclusion of gain was shown to improve the subtractor performance to that demanded by the sigma-delta architecture. A numerical simulation based upon experimentally derived data was performed to include the non-idealities of the comparator and subtractor. A photonic implementation of the sigma-delta was proposed and simulated to demonstrate the feasibility of the architecture design and to determine the signal-to-quantisation-noise ratio (SQNR) as a function input amplitude. A peak SQNR of 54dB was obtained for an oversampling ratio of 100.
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Bradley A. Clare, Bradley A. Clare, Kerry A. Corbett, Kerry A. Corbett, Kenneth J. Grant, Kenneth J. Grant, } "Performance of a photonic oversampled sigma-delta quantiser", Proc. SPIE 5814, Enabling Photonics Technologies for Defense, Security, and Aerospace Applications, (24 May 2005); doi: 10.1117/12.604263; https://doi.org/10.1117/12.604263

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