A 0.18-µm CMOS low-noise highly linear continuous-time seventh-order elliptic low-pass filter

Juan F. Fernandez-Bootello; Manuel Delgado-Restituto; Angel Rodriguez-Vazquez

doi:10.1117/12.608294

30 June 2005 A 0.18-μm CMOS low-noise highly linear continuous-time seventh-order elliptic low-pass filter

Juan F. Fernandez-Bootello, Manuel Delgado-Restituto, Angel Rodriguez-Vazquez

Proceedings Volume 5837, VLSI Circuits and Systems II; (2005) https://doi.org/10.1117/12.608294
Event: Microtechnologies for the New Millennium 2005, 2005, Sevilla, Spain

Abstract

This paper presents a fast procedure for the system-level evaluation of noise and distortion in continuous-time integrated filters. The presented approach is based on Volterra’s series theory and matrix algebra manipulation. This procedure has been integrated in a constrained optimization routine to improve the dynamic range of the filter while keeping the area and power consumption at a minimum. The proposed approach is demonstrated with the design, from system- to physical-level, of a seventh-order low-pass continuous-time elliptic filter for a high-performance broadband power-line communication receiver. The filter shows a nominal cut-off frequency of ƒ_c=34MHz, less than 1dB ripple in the pass-band, and a maximum stop-band rejection of 65dB. Additionally, the filter features 12dB programmable boost in the pass-band to counteract high frequency components attenuation. Taking into account its wideband transfer characteristic, the filter has been implemented using G_m-C techniques. The basic building block of its structure, the transconductor, uses a source degeneration topology with local feedback for linearity improving and shows a worst-case intermodulation distortion of -70 dB for two tones close to the passband edge, separated by 1MHz, with 70mV of amplitude. The filter combines very low noise (peak root spectral noise density below 56nV/√Hz) and high linearity (more than 64dB of MTPR for a DMT signal of 0.5V_pp amplitude) properties. The filter has been designed in a 0.18μm CMOS technology and it is compliant with industrial operation conditions (-40 to 85°C temperature variation and ±5% power supply deviation). The filter occupies 13mm² and exhibits a typical power consumption of 450 mW from a 1.8V voltage supply.

Citation Download Citation

Juan F. Fernandez-Bootello, Manuel Delgado-Restituto, and Angel Rodriguez-Vazquez "A 0.18-μm CMOS low-noise highly linear continuous-time seventh-order elliptic low-pass filter", Proc. SPIE 5837, VLSI Circuits and Systems II, (30 June 2005); https://doi.org/10.1117/12.608294

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