A 2-V 0.35-µm CMOS DECT RF front end with on-chip frequency synthesizer

D. Guermandi; E. Franchi; A. Gnudi; P. Rossi; F. Svelto; R. Castello

doi:10.1117/12.608109

30 June 2005 A 2V 0.35μm CMOS DECT RF front end with on-chip frequency synthesizer

D. Guermandi, E. Franchi, A. Gnudi, P. Rossi, F. Svelto, R. Castello

Proceedings Volume 5837, VLSI Circuits and Systems II; (2005) https://doi.org/10.1117/12.608109
Event: Microtechnologies for the New Millennium 2005, 2005, Sevilla, Spain

Abstract

An integrated CMOS RF front-end receiver complying with the DECT standard is presented. It is implemented in a standard 0.35μm CMOS technology operating with 2 V power supply and includes the Low Noise amplifier (LNA), the quadrature mixer and the frequency synthesizer. The frequency synthesizer is based on an integer-N Phase Locked Loop (PLL) and uses two coupled Voltage Controlled Oscillators (VCOs) for direct I/Q generation. The packaged circuit exhibits 9.2dB NF, -19.5 dBm IIP3, 27.5 dB gain and consumes 30mA. This work demonstrates the feasibility of an integrated RF front-end for a wide band standard using a direct conversion architecture that minimizes the number of external components and a cheap standard CMOS technology.

Citation Download Citation

D. Guermandi, E. Franchi, A. Gnudi, P. Rossi, F. Svelto, and R. Castello "A 2V 0.35μm CMOS DECT RF front end with on-chip frequency synthesizer", Proc. SPIE 5837, VLSI Circuits and Systems II, (30 June 2005); https://doi.org/10.1117/12.608109

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