30 June 2005 A simple 3.8-mW 300-MHz 4-bit flash analog-to-digital converter
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This paper presents a fully differential comparator that can be used in a N bit Flash A/D converter as continuous-time sigma-delta modulator quantizer. The comparator is an extension of the dynamic comparator presented by Lewis and Gray, resulting in a 4 bit A/D. Its main advantages are : compact architecture based on MOS transistor only, without any passive components such as resistance ladder or switch capacitance, fully differential input and output voltages, operating at very low voltage. Using this comparator, a 4 bit flash A/D converter has been designed in a 0.13μm CMOS technology, under 1.2V supply voltage. It operates at 300Msample/s, suitable for over sampled data converter. The simulation shows a 3.8mW power consumption for the whole ADC.
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Laurent de Lamarre, Marie-Minerve Louerat, Andreas Kaiser, "A simple 3.8-mW 300-MHz 4-bit flash analog-to-digital converter", Proc. SPIE 5837, VLSI Circuits and Systems II, (30 June 2005); doi: 10.1117/12.608343; https://doi.org/10.1117/12.608343

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