23 May 2005 Different noise mechanisms in high-k dielectric gate stacks (Invited Paper)
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Proceedings Volume 5844, Noise in Devices and Circuits III; (2005) https://doi.org/10.1117/12.611250
Event: SPIE Third International Symposium on Fluctuations and Noise, 2005, Austin, Texas, United States
Abstract
This is a review paper summarizing the recent reports on low-frequency noise in Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) with high dielectric constant (high-k) gate oxides. Although several such publications have appeared in the literature recently, the only unified theme among them is that the noise in these high-k gate stacks is considerably higher than that observed on conventional SiO2 gate oxide transistors. In addition, interface- and bulk-dielectric trap-induced correlated carrier number and mobility fluctuations (Unified Model) seem to be the commonly accepted cause of these fluctuations. This report attempts to compile the published data, make comparisons between different high-k dielectrics with respect to 1/f noise characteristics and reach preliminary conclusions. Since there is still room for improvement in processing of high-k materials for MOSFET applications, the review represents merely a slice in time of the progress made, and not meant to be a fundamental, theoretical review.
© (2005) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Zeynep Celik-Butler, "Different noise mechanisms in high-k dielectric gate stacks (Invited Paper)", Proc. SPIE 5844, Noise in Devices and Circuits III, (23 May 2005); doi: 10.1117/12.611250; https://doi.org/10.1117/12.611250
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