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28 June 2005 Application of a wafer development process to mask making
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Proceedings Volume 5853, Photomask and Next-Generation Lithography Mask Technology XII; (2005) https://doi.org/10.1117/12.617104
Event: Photomask and Next Generation Lithography Mask Technology XII, 2005, Yokohama, Japan
Abstract
Recently, the design of integrated circuits has become more and more complicated due to higher circuit densities. In particular for logic applications, the design is no longer uniform but combines different kinds of circuits into one mask layout resulting in stringent criteria for both wafer and photomask manufacturing. Photomask CD uniformity control and defectivity are two key criteria in manufacturing today’s high-end reticles, and they are both strongly impacted by the mask developing process. A new photomask develop tool (ACT-M) designed by Tokyo Electron Limited (TEL) has been installed at the Advanced Mask Technology Center (AMTC) in Dresden, Germany. This ACT-M develop tool is equipped with a standard NLD nozzle as well as an SH nozzle which are both widely used in wafer developing applications. The AMTC and TEL used the ACT-M develop tool to adapt wafer puddle develop technology to photomask manufacturing, in an attempt to capture the same optimum CD control enjoyed by the wafer industry. In this study we used the ACT-M develop tool to examine CD uniformity, local loading and defect control on P-CAR and N-CAR photomasks exposed with 50keV e-beam pattern generators. Results with both nozzle types are reported. CD uniformity, loading, and defectivity results were sufficient to meet 65-nm technology node requirements with these nozzles and tailored made develop recipes for photomask processing.
© (2005) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Gaston Lee, Celine Berger, Christian Burgel, Axel Feicke, Rusty Cantrell, and Martin Tschinkl "Application of a wafer development process to mask making", Proc. SPIE 5853, Photomask and Next-Generation Lithography Mask Technology XII, (28 June 2005); https://doi.org/10.1117/12.617104
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