Phase locked-in loop design with pre-specified transient performance

Boon Ping Ng; Ying Zhang; Yeng Chai Soh

doi:10.1117/12.616088

15 September 2005 Phase locked-in loop design with pre-specified transient performance

Boon Ping Ng, Ying Zhang, Yeng Chai Soh

Proceedings Volume 5907, Photonic Devices and Algorithms for Computing VII; 59070U (2005) https://doi.org/10.1117/12.616088
Event: Optics and Photonics 2005, 2005, San Diego, California, United States

Abstract

In this paper, we present a design and a design scheme for the phase locked-in loops satisfying given specifications. The proposed design suggests imposing an additional control signal on the normal input to the variable controlled oscillator (VCO) of the phase locked-in loop (PLL). Based on this design, a scheme of using the second method of Lyapunov is developed to choose the additional control signal and the loop filter parameters of the PLL. The proposed design and design scheme have improved the conventional PLL design results by obtaining a phase locked-in loop with pre-specified performance. The design scheme is based on nonlinear model of the PLL and it is applicable to the design of high order PLLs. Simulations results are reported to demonstrate the effectiveness of the proposed scheme.

Citation Download Citation

Boon Ping Ng, Ying Zhang, and Yeng Chai Soh "Phase locked-in loop design with pre-specified transient performance", Proc. SPIE 5907, Photonic Devices and Algorithms for Computing VII, 59070U (15 September 2005); https://doi.org/10.1117/12.616088

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