At 90nm and 65nm, the semiconductor industry is condemned to use 193nm steppers and an overwhelming amount of resolution enhancement techniques (RET). Even when using the best RET solution available, some designs are more amenable to manufacturing than others and their initial yield or startup yield is higher. Design for manufacturing (DFM) has been a hotly discussed topic in both electronic design automation (EDA) and manufacturing communities, and to date much debate remains regarding its precise definition, let alone the solution. However, it is rather intuitive that, whatever the solution is, DFM needs to simultaneously satisfy several objectives in terms of optimizing yield, manufacturing cost and manufacturing friendliness; being transparent to the designer; protecting manufacturing intellectual property (IP); and having a sensible implementation.
In this paper, we will describe a suitable technology that satisfies the data information sharing to ensure that both designers and manufacturers fulfill the expected initial and volume yield expectations. We describe how this technology may be applied pre- and post-tapeout to fulfill both designer and manufactures requirements.