In-line TEM sample preparation and wafer return strategy for rapid yield learning

N. Bicaïs-Lépinay; F. André; S. Brevers; P. Guyader; C. Trouiller; L. F. Tz. Kwakman; S. Pokrant; D. Verkleij; R. Schampers; L. Ithier; E. Sicurani; C. Wyon

doi:10.1117/12.656410

24 March 2006 In-line TEM sample preparation and wafer return strategy for rapid yield learning

N. Bicaïs-Lépinay, F. André, S. Brevers, P. Guyader, C. Trouiller, L. F. Tz. Kwakman, S. Pokrant, D. Verkleij, R. Schampers, L. Ithier, E. Sicurani, C. Wyon

Author Affiliations +

Proceedings Volume 6152, Metrology, Inspection, and Process Control for Microlithography XX; 615217 (2006) https://doi.org/10.1117/12.656410
Event: SPIE 31st International Symposium on Advanced Lithography, 2006, San Jose, California, United States

Abstract

Full wafer dual beam FIB-SEM systems have received a lot of industrial interest in the last years and by now are operational in several 200mm and 300mm fabs. These tools offer a 3D-physical characterization capability of defects and device structures and as such allow for more rapid yield learning and increased process control. Moreover, if SEM resolution is insufficient to reveal defect origin or the necessary process details, it is now also possible to prepare TEM samples using a controlled, easy to learn in-situ process and to efficiently continue the characterization with a high resolution TEM inspection. Thanks to latest hardware developments and the high degree of automation of this TEM sample preparation process, wafers no longer need to be broken and remain essentially free from contamination. Hence, the TEM lamella process can be considered as non-destructive and wafers may continue the fabrication process flow. In this paper we examine the SEM and TEM application capabilities offered by in-line dual beam systems. To qualify the wafer return strategy, the particle contamination generated by the system hardware as well as the process-induced contamination have been investigated. The particle levels measured are fully acceptable to adopt the wafer return strategy. Ga-contamination does exist but is sufficiently low and localized so that the wafer return strategy can be applied safely in the back-end of line process. Yield analysis has confirmed that there is no measurable impact on device yield. Although yet to be proven for the frond-end of line processes, the wafer return strategy has been demonstrated as a valuable one already in the backend of line processes. The as developed non-destructive 3-D SEM-TEM characterization capability does offer value added data that allow to determine the root cause of critical process defects in almost real-time and this for both standard (SEM) and more advanced (TEM) technologies.

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N. Bicaïs-Lépinay, F. André, S. Brevers, P. Guyader, C. Trouiller, L. F. Tz. Kwakman, S. Pokrant, D. Verkleij, R. Schampers, L. Ithier, E. Sicurani, and C. Wyon "In-line TEM sample preparation and wafer return strategy for rapid yield learning", Proc. SPIE 6152, Metrology, Inspection, and Process Control for Microlithography XX, 615217 (24 March 2006); https://doi.org/10.1117/12.656410

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