Paper
11 April 2006 Transistor fabrication for sub-90 nm transistor by using trim technology at ArF light source
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Abstract
The trim process with organic BARC to fabricate sub-90 nm gate was developed with ArF lithography. This trim process is not required extra hard mask layer which we usually use to overcome weak etching resistance of ArF photoresist. BARC etching step has been chosen as the best layer to apply trim process. We understood that the mix ratio of Cl2/O2 is the key process parameter to control etching bias. Also we observed that ID bias by changing BARC etching time. PCM and TEM inspection results proved that excellent transistor performance without any issues. LER improvement was observed by trim process application. and it helps to improve device performance. This organic BARC based trim process showed very promising results for sub-90 nm gate patterning.
© (2006) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Jin-Youp Kim, Jeong-Yeol Jang, Jae-Hee Kim, and Keeho Kim "Transistor fabrication for sub-90 nm transistor by using trim technology at ArF light source", Proc. SPIE 6153, Advances in Resist Technology and Processing XXIII, 61532Z (11 April 2006); https://doi.org/10.1117/12.657078
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KEYWORDS
Etching

Photoresist materials

Line edge roughness

Lithography

Transistors

Photomasks

Process control

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