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29 March 2006 Linewidth roughness reduction at the 55 nm node through combination of classical process optimization and application of surface conditioner solutions
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Abstract
In this paper, the standard ASML process was optimized to reduce LineWidth Roughness (LWR) while minimizing the impact on other process performance criteria such as Depth Of Focus (DOF) and Exposure Latitude (EL). The impact of classical process optimization parameters such as post exposure bake temperature and post exposure bake time were investigated together with less often varied parameters such as hard bake temperature. These parameters were studied in conjunction with novel surface conditioners to reduce LWR. The results show that a significant reduction in the LWR number can be obtained by combining the application of a dedicated surface conditioner solution with the fine tuning of other parameters such as post exposure bake and hard bake temperature. Several process parameters had to be tuned simultaneously to retain a decent process window for the fine tuned process although some EL had to be sacrificed.
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Patrick Wong, Wendy Gehoel, Stephan Sinkwitz, Peng Zhang, Manuel Jaramillo Jr., Madhukar B. Rao, Bridget Horvath, Brenda Ross, and Shawn Cassel "Linewidth roughness reduction at the 55 nm node through combination of classical process optimization and application of surface conditioner solutions", Proc. SPIE 6153, Advances in Resist Technology and Processing XXIII, 61533V (29 March 2006); https://doi.org/10.1117/12.657875
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