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20 March 2006 Process window OPC for reduced process variability and enhanced yield
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As the industry moves toward 45nm technology node and beyond, further reduction of lithographic process window is anticipated. The consequence of this is twofold: first, the manufactured chip will have pattern sizes that are different from the designed pattern sizes and those variations may become more dominated by systematic components as the process windows shrink; second, smaller process windows will lead to yield loss as, at small dimensions, lithographic process windows are often constrained by catastrophic fails such as resist collapse or trench scumming, rather than by gradual pattern size variation. With this notion, Optical Proximity Correction (OPC) for future technology generations must evolve from the current single process point OPC to algorithms that provide an OPC solution optimized for process variability and yield. In this paper, a Process Window OPC (PWOPC) concept is discussed, along with its place in the design-to-manufacturing flow. Use of additional models for process corners, integration of process fails and algorithm optimization for a production-worthy flow are described. Results are presented for 65nm metal levels.
© (2006) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Azalia Krasnoperova, James A. Culp, Ioana Graur, Scott Mansfield, Mohamed Al-Imam, and Hesham Maaty "Process window OPC for reduced process variability and enhanced yield", Proc. SPIE 6154, Optical Microlithography XIX, 61543L (20 March 2006);


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