Advanced process control of poly-silicon gate critical dimensions

P. Rudolph

doi:10.1117/12.658860

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10 March 2006 Advanced process control of poly silicon gate critical dimensions

P. Rudolph

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Proceedings Volume 6155, Data Analysis and Modeling for Process Control III; 61550B (2006) https://doi.org/10.1117/12.658860
Event: SPIE 31st International Symposium on Advanced Lithography, 2006, San Jose, California, United States

Abstract

The ability to control critical dimensions of structures on semiconductor devices is paramount to improving die yield and device performance. Historical methods of controlling critical dimensions include; tool matching, limiting processes to a limited tool set, and extensive monitoring. These methods have proven reasonably effective in controlling critical dimensions, but they are labor and resource intensive. The next level of factory performance is to automate corrections and drive critical dimensions to target. Use of this type of control, commonly referred to as Advanced Process Control (APC) has been a trend that is increasingly becoming the norm in our industry. This paper outlines the implementation of a controller that effectively targets Final Inspection Critical Dimensions (FICD's). This is accomplished by feeding Develop Inspection Critical Dimensions (DICD), FICD, chip code and chamber information in to a model. The controller makes use of a model to make recommendations for recipe parameters. These recipe parameters are transferred to the tool using XML protocol in an automated fashion. Offsets and disturbances are effectively adjusted for. This controller has been implemented in a production facility and has resulted in a 70 % improvement in Cpk performance.

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P. Rudolph "Advanced process control of poly silicon gate critical dimensions", Proc. SPIE 6155, Data Analysis and Modeling for Process Control III, 61550B (10 March 2006); https://doi.org/10.1117/12.658860

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