13 March 2006 Reducing DfM to practice: the lithography manufacturability assessor
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The need for accurate quantification of all aspects of design for manufacturability using a mutually compatible set of quality-metrics and units-of-measure, is reiterated and experimentally verified. A methodology to quantify the lithography component of manufacturability is proposed and its feasibility demonstrated. Three stages of lithography manufacturability assessment are described: process window analysis on realistic integrated circuits following layout manipulations for resolution enhancement and the application of optical proximity correction, failure sensitivity analysis on simulated achievable dimensional bounds (a.k.a. variability bands), and yield risk analysis on iso-probability bands. The importance and feasibility of this technique is demonstrated by quantifying the lithography manufacturability impact of redundant contact insertion and Critical Area optimization in units that can be used to drive an overall layout optimization. The need for extensive experimental calibration and improved simulation accuracy is also highlighted.
© (2006) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Lars Liebmann, Lars Liebmann, Scott Mansfield, Scott Mansfield, Geng Han, Geng Han, James Culp, James Culp, Jason Hibbeler, Jason Hibbeler, Roger Tsai, Roger Tsai, "Reducing DfM to practice: the lithography manufacturability assessor", Proc. SPIE 6156, Design and Process Integration for Microelectronic Manufacturing IV, 61560K (13 March 2006); doi: 10.1117/12.657139; https://doi.org/10.1117/12.657139


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