13 March 2006 Patterning with spacer for expanding the resolution limit of current lithography tool
Author Affiliations +
Abstract
Double Exposure Technology (DET) is one of the main candidates for expanding the resolution limit of current lithography tool. But this technology has some bottleneck such as controlling the CD uniformity and overlay of both mask involved in the lithography process. One way to solve this problem and still maintain the resolution advantage of DET is using spacers. Patterning with a spacer not only expands the resolution limit but also solves the problems involved with DET. This method realizes the interconnection between the cell and peripheral region by "space spacer" instead of "line spacer" as usually used. Spacer process involves top hard mask etch, nitride spacer, oxide deposition, CMP, and nitride strip steps sequentially. Peripheral mask was additionally added to realize the interconnection region. With the use of spacers, it was possible to realize the NAND flash memory gate pattern with less than 50nm feature only using 0.85NA (ArF).
© (2006) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Woo-Yung Jung, Woo-Yung Jung, Choi-Dong Kim, Choi-Dong Kim, Jae-Doo Eom, Jae-Doo Eom, Sung-Yoon Cho, Sung-Yoon Cho, Sung-Min Jeon, Sung-Min Jeon, Jong-Hoon Kim, Jong-Hoon Kim, Jae-In Moon, Jae-In Moon, Byung-Seok Lee, Byung-Seok Lee, Sung-Ki Park, Sung-Ki Park, } "Patterning with spacer for expanding the resolution limit of current lithography tool", Proc. SPIE 6156, Design and Process Integration for Microelectronic Manufacturing IV, 61561J (13 March 2006); doi: 10.1117/12.650991; https://doi.org/10.1117/12.650991
PROCEEDINGS
9 PAGES


SHARE
RELATED CONTENT

CDP: application of focus drilling
Proceedings of SPIE (May 27 2009)
Correction method for radial effect caused by spin process
Proceedings of SPIE (December 26 1996)
PDL oxide enabled pitch doubling
Proceedings of SPIE (March 11 2008)

Back to Top