26 April 2006 Serial decomposition of finite state machines for FPGA-based implementation
Author Affiliations +
Proceedings Volume 6159, Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments IV; 61593P (2006) https://doi.org/10.1117/12.674901
Event: Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments IV, 2005, Wilga, Poland
Abstract
This paper presents a new method of the finite state machine logic synthesis intended for the modern FPGAs with embedded memory blocks. Although the functional decomposition is recognized as the most efficient method of digital circuits synthesis for implementation with FPGAs, none of the known state encoding algorithms is effective. This is caused by the fact that traditional methods comprise two steps: internal states encoding and, then, mapping of the encoded state transition table into target architecture. In this paper a new method of FSM state encoding is presented. It is an inherent part of the serial decomposition process and therefore no separate encoding step is required. It is shown that such state encoding guarantees the best solution. The paper presents examples from standard benchmark set, which confirm that the proposed method allows for a reduction of utilization of logic cells and embedded memory blocks.
© (2006) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Grzegorz Borowik, Grzegorz Borowik, } "Serial decomposition of finite state machines for FPGA-based implementation", Proc. SPIE 6159, Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments IV, 61593P (26 April 2006); doi: 10.1117/12.674901; https://doi.org/10.1117/12.674901
PROCEEDINGS
8 PAGES


SHARE
RELATED CONTENT

A CABAC codec of H.264AVC with secure arithmetic coding
Proceedings of SPIE (February 19 2013)
Novel fast multiplier implemented using FPGA
Proceedings of SPIE (September 11 2015)
Encoding of compatible micro-operations in LUT-based FSMs
Proceedings of SPIE (August 07 2017)
On the design of a radix 10 online floating point...
Proceedings of SPIE (September 03 2009)
Novel single-chip evolutionary hardware design using FPGAs
Proceedings of SPIE (October 08 1998)

Back to Top