Paper
31 May 2006 Design of Wallace tree multiplier and other components of a quantum ALU using reversible TSG gate
Himanshu Thapliyal, M. B. Srinivas
Author Affiliations +
Proceedings Volume 6264, Quantum Informatics 2005; 62640H (2006) https://doi.org/10.1117/12.683126
Event: Quantum Informatics 2005, 2005, Moscow, Russian Federation
Abstract
This paper presents the design of a novel modified Wallace tree multiplier, using the reversible TSG gate proposed by the authors earlier. The novelty of the TSG gate is that it can also work singly as a reversible full adder. The TSG gate is also used in this paper to design various other reversible arithmetic and logical components that can be assembled to realize a primitive reversible/quantum ALU. It is also shown that these components are optimal, in terms of number of reversible gates and garbage outputs, compared to other designs existing in literature.
© (2006) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Himanshu Thapliyal and M. B. Srinivas "Design of Wallace tree multiplier and other components of a quantum ALU using reversible TSG gate", Proc. SPIE 6264, Quantum Informatics 2005, 62640H (31 May 2006); https://doi.org/10.1117/12.683126
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Cited by 3 scholarly publications.
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KEYWORDS
Logic

Curium

Quantum computing

Silicon

Computing systems

Protactinium

Calcium

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