13 October 2006 Design of frequency divider based on FPGA
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Proceedings Volume 6280, Third International Symposium on Precision Mechanical Measurements; 62800H (2006) https://doi.org/10.1117/12.716139
Event: Third International Symposium on Precision Mechanical Measurements, 2006, Urumqi, China
Abstract
This paper introduces the realization of half-integral frequency divider on the principle and gives the circuit schematic diagram. Based on the half-integral frequency divider, a design method of a general frequency divider is given by controlling the gating of exclusive-OR gate. Even, odd and decimal frequency division is realized using the model of the general frequency divider, which is designed by use of VHDL hardware description language and the schematic diagram input mode with the development software of MAX+plus II. The low layer VHDL descriptions and the designs of top layer schematic diagram of the frequency divider are presented in the paper. To validate the design, the designed dividers which have different coefficient of frequency division are simulated, and the figures are presented. Results of experiment in the device of ALTERA Corporation's EPF10K20 proof much more that the general frequency divider can realize a several of frequency division functions.
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Yi Hu, Xia Wang, Yetai Fei, "Design of frequency divider based on FPGA", Proc. SPIE 6280, Third International Symposium on Precision Mechanical Measurements, 62800H (13 October 2006); doi: 10.1117/12.716139; https://doi.org/10.1117/12.716139
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