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26 February 2007 Hardware-based JPEG 2000 video coding system
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Proceedings Volume 6496, Real-Time Image Processing 2007; 64960G (2007) https://doi.org/10.1117/12.702278
Event: Electronic Imaging 2007, 2007, San Jose, CA, United States
Abstract
In this paper, we discuss a hardware based low complexity JPEG 2000 video coding system. The hardware system is based on a software simulation system, where temporal redundancy is exploited by coding of differential frames which are arranged in an adaptive GOP structure whereby the GOP structure itself is determined by statistical analysis of differential frames. We present a hardware video coding architecture which applies this inter-frame coding system to a Digital Signal Processor (DSP). The system consists mainly of a microprocessor (ADSP-BF533 Blackfin Processor) and a JPEG 2000 chip (ADV202).
© (2007) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Arthur R. Schuchter and Andreas Uhl "Hardware-based JPEG 2000 video coding system", Proc. SPIE 6496, Real-Time Image Processing 2007, 64960G (26 February 2007); https://doi.org/10.1117/12.702278
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