21 February 2007 Shared transistor architecture with diagonally connected pixels for CMOS image sensors
Author Affiliations +
Abstract
We have developed a pixel unit for CMOS image sensors (CISs) that has a shared transistor architecture with diagonally connected pixels. This pixel unit is composed of four photodiodes and seven transistors. It has a pixel size of 2.5-&mgr;m square. The transistors were designed using 0.18-micron aluminum process technology. Shared diffusion for reading signal electrons occurs between the corners of two photodiodes. The advantages of this layout include a long amplifier gate length and a large photodiode area.
© (2007) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Yoshiharu Kudoh, Fumihiko Koga, Takashi Abe, Haruyuki Taniguchi, Maki Sato, Hiroaki Ishiwata, Susumu Ooki, Ryoji Suzuki, Hiroyuki Mori, "Shared transistor architecture with diagonally connected pixels for CMOS image sensors", Proc. SPIE 6501, Sensors, Cameras, and Systems for Scientific/Industrial Applications VIII, 65010G (21 February 2007); doi: 10.1117/12.704835; https://doi.org/10.1117/12.704835
PROCEEDINGS
8 PAGES


SHARE
Back to Top