Translator Disclaimer
29 January 2007 Real-time video coding under power constraint based on H.264 codec
Author Affiliations +
Proceedings Volume 6508, Visual Communications and Image Processing 2007; 650802 (2007)
Event: Electronic Imaging 2007, 2007, San Jose, CA, United States
In this paper, we propose a joint power-distortion optimization scheme for real-time H.264 video encoding under the power constraint. Firstly, the power constraint is translated to the complexity constraint based on DVS technology. Secondly, a computation allocation model (CAM) with virtual buffers is proposed to facilitate the optimal allocation of constrained computational resource for each frame. Thirdly, the complexity adjustable encoder based on optimal motion estimation and mode decision is proposed to meet the allocated resource. The proposed scheme takes the advantage of some new features of H.264/AVC video coding tools such as early termination strategy in fast ME. Moreover, it can avoid suffering from the high overhead of the parametric power control algorithms and achieve fine complexity scalability in a wide range with stable rate-distortion performance. The proposed scheme also shows the potential of a further reduction of computation and power consumption in the decoding without any change on the existing decoders.
© (2007) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Li Su, Yan Lu, Feng Wu, Shipeng Li, and Wen Gao "Real-time video coding under power constraint based on H.264 codec", Proc. SPIE 6508, Visual Communications and Image Processing 2007, 650802 (29 January 2007);

Back to Top