Optical and Process Correction in the 45nm node is requiring an ever higher level of characterization. The greater
complexity drives a need for automation of the metrology process allowing more efficient, accurate and effective use of
the engineering resources and metrology tool time in the fab, helping to satisfy what seems an insatiable appetite for data
by lithographers and modelers charged with development of 45nm and 32nm processes. The scope of the work
referenced here is a 45nm design cycle "full-loop automation", starting with gds formatted target design layout and
ending with the necessary feedback of one and two dimensional printed wafer metrology.
In this paper the authors consider the key elements of software, algorithmic framework and Critical Dimension Scanning
Electron Microscope (CDSEM) functionality necessary to automate its recipe creation. We evaluate specific problems with the methodology of the former art, "on-tool on-wafer" recipe construction, and discuss how the implementation of the design based recipe generation improves upon the overall metrology process. Individual target-by-target construction, use of a one pattern recognition template fits all approach, a blind navigation to the desired measurement
feature, lengthy sessions on tool to construct recipes and limited ability to determine measurement quality in the resultant
data set are each discussed as to how the state of the art Design Based Metrology (DBM) approach is implemented.
The offline created recipes have shown pattern recognition success rates of up to 100% and measurement success rates of
up to 93% for line/space as well as for 2D Minimum/Maximum measurements without manual assists during measurement.